(1) Field of the Invention
This invention relates generally to voltage regulators, and more particularly to low dropout (LDO) voltage regulators having low voltage devices still allowing higher voltage levels.
(2) Description of the Prior Art
Low-dropout (LDO) linear regulators are commonly used in all kind of mobile electronic devices to provide power to digital circuits, where point-of-load regulation is important. In prior art generally LDOs must operate with high input voltage levels up to 5.5 Volts or more requiring equally tolerant CMOS devices.
FIG. 1 prior art shows a typical standard concept of an LDO with a single pass device M1, a voltage divider 1 comprising resistors R1 and R2 providing feedback to the differential amplifier AMP1, and a switch S1. The differential amplifier compares the feedback voltage of the voltage divider 1 with a reference voltage VREF. During power down, switch S1 is closed to block any current through pass device M1. Therefore the output voltage VOUT becomes 0 Volt, creating at pass device M1 a drain-source voltage equal to VDD. Using prior art circuits pass devices tolerant for relative high voltages are required to cope with this kind of voltage levels. Especially to avoid stress during power down the pass device has to be at least 5 Volts tolerant. This means that large chip areas and high production costs are required yielding to low performance of such devices in deep sub-micron processes.
There are patents known dealing with LDO circuits:
U.S. Pat. No. 6,661,211 (to Currelly et al.) teaches a quick-starting low-voltage DC power supply circuit having a switch mode DC-to-DC converter connected to a DC supply source. A low-dropout-regulator (LDO) connected in parallel with the switch-mode DC to DC converter, and a diode is connected in series with the output of the low-dropout-regulator connecting the output of the low-dropout-regulator to the output of the switch-mode DC-to-DC converter. The arrangement is such that the start-up output voltage of the circuit is the output voltage of the low-dropout-regulator and the long-term output voltage of the circuit is supplied by the switch-mode DC-to-DC converter output.
U.S. Pat. No. 6,333,623 (to Hesley et al.) discloses a low drop-out (LDO) voltage regulator including an output stage of having a pass device and a discharge device arranged in complementary voltage follower configurations to both source load current to and sink load current from a regulated output voltage conductor. The pass device and the discharge device are controlled through a single feedback loop.
U.S. Pat. No. 6,188,211 (to Rincon-Mora) discloses a low drop-out (LDO) voltage regulator and system including the same. An error amplifier controls the gate voltage of a source follower transistor in response to the difference between a feedback voltage from the output and a reference voltage. The source of the source follower transistor is connected to the gates of an output transistor, which drives the output from the input voltage in response to the source follower transistor. A current mirror transistor has its gate also connected to the gate of the output transistor, and mirrors the output current at a much reduced ratio. The mirror current is conducted through a network of transistors, and controls the conduction of a first feedback transistor and a second feedback transistor, which are each, connected to the source of the source follower transistor and in parallel with a weak current source. The response of the first feedback transistor is slowed by a resistor and capacitor, while the second feedback transistor is not delayed. As such, the second feedback transistor assists transient response, particularly in discharging the gate capacitance of the output transistor, while the first feedback transistor partially cancels load regulation effects.
Furthermore Gabriel Rincon-Mora describes “A low-Voltage, Low-quiescent Current LDO Regulator” in IEEE Journal of Solid States Circuits, Vol 33, no 1, January 1998.